The present invention relates to a write control apparatus for a video RAM.
A video RAM is used for the control of a graphic display. A dot pattern, i.e., pattern data indicating whether or not a dot is to be displayed is stored at the address of a video RAM which corresponds to a coordinate position on a display screen. When such a video RAM is connected to the display device of a CRT display, etc., and data is read out from the video RAM, graphic display is realized. In graphic display, one dot is generally represented by 1-bit data. Therefore, if it is assumed that a screen has 200 rows (200 dots) in the vertical direction and 80 columns in the horizontal direction (640 dots, i.e., 8 dots/column), the dot pattern data of one frame comprises 16 kilo byte (KB). If the pattern data is written into the video RAM in units of dots, i.e., if the video RAM is accessible in units of bits, such a configuration is convenient in terms of the write operation. However, in such a case, the addressing space of the video RAM must be quite large, and requires a complex drive circuit. For this reason, each item of pattern data is generally written at a single address of the video RAM in units of several bits. Since a memory generally has a configuration wherein each word comprises 8 bits, the pattern data is stored at individual addresses of the video RAM in units of 8 bits, which are horizontally continuous in a screen area specified by a row and column of the screen. Conventionally, the address of the video RAM for storing the 8-bit pattern data at the upper left corner of the screen is address 0, with the address being sequentially increased toward the lower right side. The respective areas of the screen are so allocated as to have consecutive addresses in the horizontal direction. Thus, the video RAM address l corresponding to an area of an nth row (n=0 to 199) and an mth column (m=0 to 79) may be expressed by the following equation: EQU l=80.times.n+m (1)
To write horizontally continuous pattern data, it is sufficient to calculate the address of the initial item of 8-bit data. For the addresses of the remaining data, the address need only be incremented by one for each additional item of 8-bit data. However, the addresses of vertically adjacent areas of the screen are separated by 80 addresses. For this reason, pattern data of vertically continuous areas cannot be continuously written into the video RAM. To store pattern data of vertically continuous areas, the address must be calculated for each item of 8-bit data (the preceding address being incremented by 80), thus resulting in a time-consuming operation. This presents a considerable problem in a personal computer which has a graphic function for processing Chinese character patterns and the like. More specifically, vertical lines, which are frequently included in a Chinese character pattern, cannot be continuously written in a video RAM. This results in a slow display speed of a Chinese character display.